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dcm12s0a0 s12 n fa datasheet e - mail : dcdc @ d elta.com.tw ds_ dc m12s0a0s12 n fa _ 10022013 http://www.deltaww.com/dcdc p1 features ? high efficiency: 9 5.4 % @ 12vin, 5 .0 v/12a out 9 3.3 % @ 12vin, 3.3v/12a out 9 1.6 % @ 12vin, 2.5v/12a out 89 . 2 % @ 12vin, 1.8v/12a out 8 5 . 6 % @ 12vin, 1.2v/12a out 8 0.2 % @ 1 0 vin, 0.69v/12a out ? small size and low profile: 20.3 x 11.4 x 8.5 mm ( 0.8 x 0.4 5 x 0. 33 ) ? surface mount packaging ? standard footprint ? voltage and resistor - based trim ? pre - bias startup ? output voltage tracking ? no minimum load required ? output voltage programmable from ? 0. 69 vdc to 5. 0 vdc via external resistor ? fixed freque ncy operation ? input uvlo, output ocp ? remote on/off ? iso 9001, tl 9000, iso 14001, qs9000, ohsas18001 certified manufacturing facility ? ul/cul 60950 - 1 (us & canada) ? ce mark meets 73/23/eec and 93/68/eec directives delphi d cm , non - isolated point of load dc/dc power modules: 4.5~14 vin, 0.69 - 5. 0 v/ 12 aout the delphi series dcm , 4.5 - 14 v input, single output, non - isolated point of load dc/dc converters are the latest offering from a world leader in power systems technology and manufacturing -- delta electronics, inc. the d cm series provides a programmable output voltage from 0. 69 v to 5. 0 v using an external resistor and has flexible and programmable tracking features to enable a variety of startup voltages as well as tracking between power modules. this product family is available in surface mount and provides up to 12a of output current in an industry standard footprint. with creative design technology and optimization of component placement, these converters possess outstanding electrical and thermal performance, as well as extremely high reliability under highly stressful operat ing conditions options ? negative /positive on/off logic ? tracking feature ? sequence feature applications ? t elecom / datacom ? distributed power architectures ? servers and workstations ? lan / wan applications ? data processing applications
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 2 technical specific ations parameter notes and conditions dc m 12s0a0s 12 p (n) fa min. typ. max. units absolute maximum ratings input voltage (continuous) - 0.3 15 v sequencing voltage - 0.3 vin max v ope rating ambient tem perature - 40 85 storage temperature - 55 125 input characteristics operating input voltage vo Q vin C 0.6 4.5 14.0 v input under - voltage lockout turn - on voltage threshold 4.45 v turn - off voltage threshold 4.2 v lockout hysteresis voltage 0.25 v maximum input current vin=4.5v to14v, io=io,max 11.5 a no - load input current (vin = 12.0vdc, i o = 0, module enabled) vo,set = 0.6 9 vdc 26 ma vo,set = 3.3 vdc 50 ma off converter input current (vin = 12.0vdc, module disabled) 1.2 ma inr ush transient 1 a2s input reflected ripple current, peak - to - peak (5hz to 20mhz, 1h source impedance; vin =0 to 14v, io= iomax ; 12.5 map - p input ripple rejection(120hz) 45 db output characteristics output voltage set point with 0.5% tolerance for external resistor used to set output voltage) - 1.5 vo,set +1.5 %vo, set output voltage adjustable range (selected by an external resistor) 0. 6 9 5. 0 v output voltage regulation line(vin=vin, min to vin, max) for vo>=2.5v 0.4 %vo,set vo,set for vo<2.5v 10 mv load(io=io, min to io, max) for vo>=2.5v 10 mv for vo<2.5v 5 mv temperature(tref=ta, min to ta, max) for vo>=2.5v 0. 5 %vo,set vo,set for vo<2.5v 5 mv total output voltage range over sample load, line and temperature - 2.5 + 2.5 %vo,set output voltage ripple and noise 5hz to 20mhz bandwi dth peak - to - peak full load, 1f+10uf +47 uf ceramic 65 80 mv rms full load, 1f+10uf +47 uf ceramic 23 28 mv output current range 0 12 a output voltage over - shoot at start - up 5 % vo,set output dc current - limit inception 150 % io output sho rt - circuit current (hiccup mode) io,s/c 2 adc dynamic characteristics dynamic load response 10f tan & 1f ceramic load cap, 1 a/s positive step change in output current 0 % io, max to 5 0% io, max 36 0 mv negative step change in output curre nt 5 0% io, max to 0% io, max 40 0 mv settling time to 10% of peak deviation 5 0 s turn - on transient io=io.max delay time, from on/off control time for von/off to vo=10% of vo,set 4 ms delay time, from input time for vin=vin,min to vo=10% of v o,set 3.5 ms output voltage rise time time for vo to rise from 10% to 90% of vo,set 5 ms output capacitive load full load; esr R 0.15 m 47 800 f efficiency vo=5.0v vin=12v, 100% load 9 5.4 % vo= 3.3 v vin=12v, 100% load 9 3.3 % vo= 2.5 v vin=12v, 100% load 9 1.6 % vo =1.8 v vin=12v, 100% load 89.2 % vo= 1.2 v vin=12v, 100% load 8 5.6 % vo =0.69 v vin= 10 v, 100% load 8 0.2 % feature characteristics switching frequency 5 00 khz synchronization frequency range 520 600 khz on/off control, (negative logic) logic low voltage module on, von/off 0 1 v logic high voltage module off, von/off 2.0 vin,max v lo gic low current module on, ion/off 10 a logic high current module off, ion/off 1 ma on/off control, (positive logic) logic high voltage module on, von/off vin - 1 vin,max v logic low voltage module off, von/off 3. 5 v logic low current mod ule on, ion/off 3 ma logic high current module off, ion/off 25 a tracking slew rate capability 0.5 v/msec tracking delay time delay from vin.min to application of tracking voltage 10 ms tracking accuracy power - up 0.5 v/ms 100 mv power - down 0.5 v/ms 1 5 0 mv general specifications mtbf io=80% of io, max; ta=25c 22 m hours weight 3.8 grams (t a = 25c, airflow rate = 300 lfm, v in = 4.5 vdc and 14.0 vdc, nominal vout unless otherwise noted.)
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 3 electric al characteristics c urves figure 1: converter efficiency vs. output current (0.69vout) figure 2: converter efficiency vs. output current (1.2vout) figure 3: converter efficiency vs. output current (1.8vout) figure 4: converter efficiency v s. output current (2.5vout) figure 5 : converter efficiency vs. output current 3.3vout) figure 6 : converter efficiency vs. output current (5.0vout)
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 4 electrical character istics curves (con.) figure 7 : output ripple & noise at 7 vin, 0.69v/1 2a out ch1:vout, 20mv/div, 1u s/div figure 8 : output ripple & noise at 12vin, 1.2 v/12a out ch1:vout, 20mv/div, 1u s/div figure 9 : output ripple & noise at 12vin, 1.8 v/12a out ch1:vout, 20mv/div, 1u s/div figure 10 : output ripple & noise at 12vin, 2.5 v/12a out ch1:vout, 20mv/div, 1u s/div figure 11 : output ripple & noise at 12vin, 3.3 v/12a out ch1:vout, 20mv/div, 1u s/div figure 12 : output ripple & noise at 12vin, 5.0 v/12a out ch1:vout, 20mv/div, 1u s/div
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 5 electrical character istics curves (co n.) figure 1 3 : turn on delay time at 7 vin, 0.69 v/ 12 a out. ( top : vout, 0.2 v/div ; bottom : vin, 5 v/div ; 2ms/div ) figure 14 : turn on delay time at 12 vin, 1. 2 v/ 12 a out. ( top : vout, 0.5 v/div ; bottom : vin, 5 v/div ; 2ms/div ) figure 15 : turn on d elay time at 12 vin, 1.8 v/ 12 a out . ( top : vout, 0.5 v/div ; bottom : vin, 5 v/div ; 2ms/div ) figure 16 : turn on delay time at 12 vin, 2.5 v/ 12 a out . ( top : vout, 1 v/div ; bottom : vin, 5 v/div ; 2ms/div ) figure 17 : turn on delay time at 12 vin, 3.3 v/ 12 a out . ( top : vout, 1 v/div ; bottom : vin, 5 v/div ; 2ms/div ) figure 18 : turn on delay time at 12 vin, 5.0 v/ 12 a out . ( top : vout, 2 v/div ; bottom : vin, 5 v/div ; 2ms/div )
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 6 electrical character istics curves (con.) figure 19 : turn on delay time at remote on 7 vin, 0.6 9 v/ 12 a out . ( top : vout, 0.2 v/div ; bottom : on/off , 2 v/div ; 2ms/div ) figure 20 : turn on delay time at remote on 12 vin, 1.2 v/ 12 a out . ( top : vout, 0.5 v/div ; bottom : on/off , 2 v/div ; 2ms/div ) figure 21 : turn on delay time at remote on 12 vin, 1.8 v/ 12 a out . ( top : vout, 1 v/div ; bottom : on/off , 2 v/div ; 2ms/div ) figure 2 2 : turn on delay time at remote on 12 vin, 2.5 v/ 12 a out . ( top : vout, 1 v/div ; bottom : on/off , 2 v/div ; 2ms/div ) figure 23 : turn on delay time at remote on 12 vin, 3.3 v/ 12 a out . ( top : vout, 2 v/div ; bottom : on/off , 2 v/div ; 2ms/div ) figure 24 : turn on delay time at remote on 12 vin, 5.0 v/ 12 a out . ( top : vout, 0.2 v/div ; bottom : on/off , 2 v/div ; 2ms/div )
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 7 electrical character istics curves (con.) figure 25 : tracking func ti on, vtracking= 1 v, vout= 0.69 v, full load ( top : vout, 0.5 v/div ; bottom : tracking, 0.5 v/div, 500us/div ) figure 26 : tracking func ti on, vtracking= 2 v, vout= 1.2 v, full load ( top : vout, 0.5 v/div ; bottom : tracking, 0.5 v/div, 500us/div ) figure 27 : tracking func ti on, vtrack ing= 2.5 v, vout= 1.8 v, full load ( top : vout, 1 v/div ; bottom : tracking, 1v/div, 500us/div ) figure 28 : tracking func ti on, vtracking= 3 v, vout= 2.5 v, full load ( top : vout, 1 v/div ; bottom : tracking, 1v/div, 500us/div ) figure 29 : tracking func ti on, vtrack ing= 4 v, vout= 3.3 v, full load ( top : vout, 2 v/div ; bottom : tracking, 2 v/div, 500us/div ) figure 30 : tracking func ti on, vtracking=6v, vout= 5.0v, full load ( top : vout, 2 v/div ; bottom : tracking , 2 v/div, 500us/div )
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 8 electrical character istics curves (con.) figure 31 : typical transient response to step load change at 1a/s from 0%~ 50%~0% of io, max at 7 vin, 0.69vout (cout = 1uf ceramic, 47uf+10fceramic) ch1 : vout, 0.2v/div, 100us/div figure 32 : typical transient response to step load change at 1 a/s from 0%~ 50%~0% of io, max at 12vin, 1. 2 vout (cout = 1uf ceramic, 47uf+10fceramic) ch1 : vout, 0.2v/div, 100us/div figure 33 : typical transient response to step load change at 1a/s from 0%~ 50%~0% of io, max at 12vin, 1.8vout (cout = 1uf c eramic, 47uf+10fceramic) ch1 : vout, 0.2v/div, 100us/div figure 34 : typical transient response to step load change at 1a/s from 0%~ 50%~0% of io, max at 12vin, 2.5 vout (cout = 1uf ceramic, 47uf+10fceramic) ch1 : vout, 0.2v/div, 100us/div
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 9 electrical character istics curves (con.) figure 35 : typical transient response to step load change at 1a/s from 0%~ 50%~0% of io, max at 12vin, 3.3 vout (cout = 1uf ceramic, 47uf+10fceramic) ch1 : vout, 0.2v/div, 100us/div figure 36 : typical tran sient response to step load change at 1a/s from 0%~ 50%~0% of io, max at 12vin, 5.0 vout (cout = 1uf ceramic, 47uf+10fceramic) ch1 : vout, 0.2v/div, 100us/div
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 10 test configurations figure 37 : input reflected - ripple test setup note: use a 10f tantalum and 1f capacitor. scope measurement should be made using a bnc connector. figure 38 : peak - peak output noise and startup transient measurement test setup. figure 39 : output voltage and efficiency measurement test setup note: all measurements are taken at the module terminals. when the module is not soldered (via socket), place kelvin connections at module terminals to avoid mea surement errors due to contact resistance. design considerations input source impedance to maintain low noise and ripple at the input voltage, it is critical to use low esr capacitors at the input to the module. a highly inductive source can affect the stability of the module. an input capacitance must be placed close to the modules input pins to filter ripple current and ensure module stability in the presence of inductive traces that supply the input voltage to the module. vo gnd copper strip 10uf tantalum 1uf ceramic scope resistive load supply i i v i vo gnd io load contact and distribution losses contact resistance % 100 ) ( ? ? ? ? ii vi io vo ?
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 11 design consideration s (con.) safety considerations for safety - agency approval the power module must be installed in compliance with the spacing and separation requirements of the end - use safety agency standards. for the converter output to be considered meeting the requirements of safety extra - low voltage (selv), the input must meet selv requirements. the power module has extra - low voltage (elv) outputs when all inputs are elv. the input to these units is to be provided with a fast acting fuse with a maximum rating of 15a in the positive input lead. input under voltage lockout at input voltages below the input under voltage lockout limit, the module operation is disabled. the module will begin to operate at an input voltage above the under voltage lockout turn - on threshold. over - current protection to provide protection in an output over load fault condition, the unit is equipped with internal over - current protection. when the over - current protection is triggered, the unit enters hiccup mo de. the units operate normally once the fault condition is removed . features description s remote on/off the dcm series power modules have an on/off pin for remote on/off operation. both positive and negative on/off logic options are available in the dc m series power modules. for positive logic module, connect an open collector (npn) transistor or open drain (n channel) mosfet between the on/off pin and the gnd pin (see figure 40 ). positive logic on/off signal turns the module on during the logic high a nd turns the module off during the logic low. when the positive on/off function is not used, leave the pin floating or tie to vin (module will be on). for negative logic module, the on/off pin is pulled high with an external pull - up 5k resistor (see figure 41 ). negative logic on/off signal turns the module off during logic high and turns the module on during logic low. if the negative on/off function is not used, leave the pin floating or tie to gnd. (module will be on) figure 40 : positive remote on/off implementation figure 4 1 : negative remote on/off implementation vo o n/o ff v in gnd q1 rl i o n /o f f vo o n/o ff v in gnd q1 rl r pull- up i o n /o ff
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 12 features description s (con.) remote sense the dcm provide vo remote sensing to achieve proper regulation at the load points and reduce effects of distribution losses on output line. in the event of a n open remote sense line, the module shall maintain local sense regulation through an internal resistor. the module shall correct for a total of 0.5v of loss. the remote sense line impedance shall be < 10 ? . figure 4 2 : effective circuit configuration fo r remote sense operation output voltage programming the output voltage of the dcm can be programmed to any voltage between 0.69vdc and 5. 0 vdc by connecting one resistor (shown as rtrim in figure 43 ) between the trim and gnd pins of t he module. without this external resistor, the output voltage of the module is 0.69 vdc. to calculate the value of the resistor rtrim for a particular output voltage vo, please use the following equation: rtrim is the external r esistor in k vo is the desired output voltage. for example, to program the output voltage of the dcm module to 5.0vdc, rtrim is calculated as follows: figure 4 3 : circuit configuration for programming output voltage using an externa l resistor table 1 provides rtrim values required for some common output voltages, by using a 0.5% tolerance trim resistor, set point tolerance of 1.5% can be achieved as specified in the electrical specification. table 1 c ertain restrictions apply on the output voltage set point depending on the input voltage. these are shown in the output voltage vs. input voltage set point area plot in figure 44 . the upper limit curve shows that for output voltages of 0.9v and lower, the input voltage must be lower than the maximum of 14v. the lower limit curve shows that for output voltages of 3.3v and higher, the input voltage needs to be larger than the minimum of 4.5v. figure 4 4: output voltage vs. input voltage set point area plot showing limits where the ou tput voltage can be set for different input voltages. vo sense vin gnd rl distribution losses distribution losses distribution losses distribution losses ? ? ? ? ? ? ? ? ? k vo rtrim 69 . 0 9 . 6 ? ? ? ? ? ? ? ? ? ? ? k k rtrim 601 . 1 69 . 0 0 . 5 9 . 6 vo trim gnd rload rtrim
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 13 feature descriptions (con.) voltage margining output voltage margining can be implemented in the dcm modules by connecting a resistor, r margin - up, from the trim pin to the ground pin for margining - up the output voltage and by connecting a resistor, rmargin - down, from the trim pin to the output pin for margining - down. figure 4 5 shows the circuit configuration for output voltage margining. if unused, leave the trim pin unconnected. a calculation tool is available from the evaluation procedure which computes the values of rmargin - up and rmargin - down for a specific output voltage and margin percentage. figure 4 5 : circuit configuration for output voltage margining output voltage sequencing the d cm 12v 12a modules include a sequencing feature, ez - sequence that enables users to implement various types of output voltage sequencing in their applications. this is accomplished via an additional sequencing pin. when not using the sequencing feature, eit her tie the seq pin to vin or leave it unconnected. when an analog voltage is applied to the seq pin, the output voltage tracks t his voltage until the output reaches the set - point voltage. the final value of the seq voltage must be set higher than the set - point voltage of the module. the output voltage follows the voltage on the seq pin on a one - to - one basis. by connecting multiple modules together, multiple modules can track their output voltages to the voltage applied on the seq pin. for proper voltage sequencing, first, input voltage is applied to the module. the on/off pin of the module is left unconnected (or tied to gnd for neg ative logic modules or tied to vin for positive logic modules) so that the module is on by default. after applying input voltage to the module, a minimum 10msec delay is required before applying voltage on the seq pin. this delay gives the module enough ti me to complete its internal power - up soft - start cycle. during the delay time, the seq pin should be held close to ground (nominally 50mv 20 mv). this is required to keep the internal op - amp out of saturation thus preventing output overshoot during the st art of the sequencing ramp. by selecting resistor r1 (see figure 4 7 ) according to the following equation figure 4 6 : sequential start - up the voltage at the sequencing pin will be 50mv when the sequencing signal is at zero. vo on/off vin gnd trim q2 q1 rmargin-up rmargin-down rtrim ? ? ? ? ? ? ? ? ? 05 . 0 24950 1 vin r
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 14 feature descriptions (con.) after the 10msec delay, an analog voltage is applied to the seq pin and the output voltage of the module will track this voltage on a one - to - one volt base s until the output reaches the set - point voltage. to initiate simultaneous shutdown of the modules, the seq pin voltage is lowered in a controlled manner. the output voltage of the modules tracks the voltages below their set - point voltages on a one - to - one basis. a valid input voltage must be maintained until the tracking and output voltages reach ground potential. when using the ez - sequencetm feature to control start - up of the module, pre - bias immunity during startup is disabled. the pre - bias immunity featu re of the module relies on the module being in the diode - mode during start - up. when using the ez - sequencetm feature, modules goes through an internal set - up time of 10msec, and will be in synchronous rectification mode when the voltage at the seq pin is ap plied. this will result in the module sinking current if a pre - bias voltage is present at the output of the module. figure 47 : circuit showing connection of the sequencing signal to the seq pin. simultaneous simultaneous tracking (figure 41) is implem ented by using the track pin. the objective is to minimize the voltage difference between the power supply outputs during power up and down. power good the dcm modules provide a power good (pgood) signal that is implemented with an open - drain output to indicate that the output voltage is within the regulation limits of the power module. the pgood signal will be de - asserted to a low state if any condition such as over temperature, over current or loss of regulation occurs that would result in the output voltage going 10% outside the set point value. the pgood terminal should be connected thro ugh a pull up resistor (suggested value 100k) to a source of 5vdc or lower. monotonic start - up and shutdown the dcm 12a modules have monotonic start - up and shutdown behavior for any combination of rated input voltage, output current and operating temper ature range. synchronization the dcm 12a modules can be synchronized using an external signal. details of the sync signal are provided in below table. if the synchronization function is not being used, leave the sync pin floating.
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 15 thermal consideratio ns thermal management is an important part of the system design. to ensure proper, reliable operation, sufficient cooling o f the power module is needed over the entire temperature range of the module. convection cooling is usually the dominant mode of heat transfer. hence, the choice of equipment to characterize the thermal performance of the power module is a wind tunnel. t hermal testing setup deltas dc/dc power modules are characterized in heated vertical wind tunnels that simulate the thermal environments encountered in most electronics equipment. this type of equipment commonly uses vertically mounted circuit cards in c abinet racks in which the power modules are mounted. the following figure shows the wind tunnel characterization setup. the power module is mounted on a test pwb and is vertically positioned within the wind tunnel. figure 4 8 : wind tunnel test setup thermal derating heat can be removed by increasing airflow over the module. to enhance system reliability, the power module should always be operated below the maximum operating temperature. if the temperature exceeds the maximum module temperature, relia bility of the unit may be affected. thermal curves figure 4 9 : temperature measurement location the allowed maximum hot s pot temperature is defined at 1 25 figure 5 0 : output current vs. ambient temperature and air velocity@vin=12v, vout=5.0v(either or ientation) figure 5 1 : output current vs. ambient temperature and air velocity@vin=12v, vout=3.3v(either orientation) air flow module pwb 50.8(2.00") air velocity and ambient temperature sured below the module fancing pwb note: wind tunnel test setup figure dimensions are in millimeters and (inches) 0 2 4 6 8 10 12 25 30 35 40 45 50 55 60 65 70 75 80 85 output current(a) ambient temperature ( ) dcm12s0a0s12 output current vs. ambient temperature and air velocity @vin = 12v, vout=5.0v (either orientation) natural convection 100lfm 0 2 4 6 8 10 12 25 30 35 40 45 50 55 60 65 70 75 80 85 output current(a) ambient temperature ( ) dcm12s0a0s12 output current vs. ambient temperature and air velocity @vin = 12v, vout=3.3v (either orientation) natural convection
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 16 thermal curves figure 5 2 : output current vs. ambient temperature and air velocity@vin=12v, vout=2.5v(either orientation) figure 5 3 : output current vs. ambient temperature and air velocity@vin=12v, vout=1.8v(either orientation) figure 5 4 : output current vs. ambient temperature and air velocity@vin= 12 v, vout= 1.2 v(either orientation) thermal curves figure 55 : output current vs. ambient temperature and air velocity@vin= 7 v, vout= 0.7 v(either orientation) 0 2 4 6 8 10 12 25 30 35 40 45 50 55 60 65 70 75 80 85 output current(a) ambient temperature ( ) dcm12s0a0s12 output current vs. ambient temperature and air velocity @vin = 12v, vout=2.5v (either orientation) natural convection 0 2 4 6 8 10 12 25 30 35 40 45 50 55 60 65 70 75 80 85 output current(a) ambient temperature ( ) dcm12s0a0s12 output current vs. ambient temperature and air velocity @vin = 12v, vout=1.8v (either orientation) natural convection 0 2 4 6 8 10 12 25 30 35 40 45 50 55 60 65 70 75 80 85 output current(a) ambient temperature ( ) dcm12s0a0s12 output current vs. ambient temperature and air velocity @vin = 12v, vout=1.2v (either orientation) natural convection 0 2 4 6 8 10 12 25 30 35 40 45 50 55 60 65 70 75 80 85 output current(a) ambient temperature ( ) dcm12s0a0s12 output current vs. ambient temperature and air velocity @vin = 7v, vout=0.7v (either orientation) natural convection
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 17 pick and place locat ion recommended pad layo ut surface - mount tape & reel
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 18 lead (sn/pb) process recommend te mp. profile note: the temperature refers to the pin of dcm , measured on the pin vout joint. lead free (sac) proc ess recommend temp. profile note: the temperature refers to the pin of dcm , measured on the pin vout joint. temp . time 150 200 90~120 sec. time limited 75 sec. above 220 220 preheat time ramp up max. 3 ramp down max. 4 peak temp. 240 ~ 245 25
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 19 mechanical drawin g
ds_ dc m12s0a0s12 n fa _ 1 0022013 e - mail : dcdc @ d elta.com.tw http://www.deltaww.com/dcdc p 20 p art numbering system dcm 12 s 0a0 s 12 n f a product series input voltage numbers of outputs output voltage package type output current on/off logic optio n code d c t - 3 a d c s - 6a d c m - 1 2 a d c l - 20 a 04 - 2. 4 ~5.5v 1 2 C 4.5 ~14v s - single 0a0 - programmable s - smd 0 3 - 3 a 06 - 6a 1 2 - 1 2 a 20 - 20 a n - negative p - positive f - rohs 6/6 (lead free) a - standard fun c tion model list model name packaging inpu t voltage output voltage output current efficiency 12 vin, 5 vdc @ 12 a d cm12 s0a0s 12 n fa smd 4.5v ~ 14 vdc 0. 69 v~ 5. 0 vdc 12 a 9 5.4 % contact: www.deltaww.com/dcdc usa: telephone: east coast: 978 - 656 - 3993 west coast: 510 - 668 - 5100 fax: (978) 656 3964 email: dcdc@delta - corp.com europe: telephone: +31 - 20 - 655 - 0967 fax: +31 - 20 - 655 - 0999 email: dcdc@delta - es. com asia & the rest o f world: telephone: +886 3 4526107 x6220 ~6224 fax: +886 3 4513485 email: dcdc@delta.com.tw warranty delta offers a two ( 2) year limited warranty. complete warranty information is listed on our web site or is ava ilable upon request from delta. information furnished by delta is believed to be accurate and reliable. however, no responsibility is assumed by delta for its use, nor for any infringements of patents or other rights of third parties, which may result fro m its use. no license is granted by implication or otherwise under any patent or patent rights of delta. delta reserves the right to revise these specifications at any time, without notice .

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